Encapsulated conductive polymer device and method of manufacturing the same

ABSTRACT

The present invention relates to encapsulated or insulated devices. In certain environments and applications, it is necessary to protect devices from external agents. The present invention achieves this by providing a device comprising a segment of insulating material having an aperture defined therein. An element of active, for example positive temperature coefficient (PTC), material is received within the defined aperture. The element is substantially covered by a first metal layer on one side and a second metal layer on the opposing side. A first layer of insulating material substantially covers the first metal layer and a second layer of insulating material substantially covers the second layer of metal. A first terminal provides an external electrical connection to the first metal layer and a second terminal provides an external electrical connection to the second metal layer. The first terminal is connected to the first metal layer by a conductive interconnect which passes through the first insulating layer and the second terminal is connected to the second metal layer by a conductive interconnect passes through the second insulating layer. Moreover, the invention provides a method for manufacturing devices in a matrix form using conventional PCB techniques to facilitate the mass production of encapsulated devices. Additionally, the resulting components may be used as either leaded or SMT components in either single device or multiple device configurations in both SIP and DIP packages.

The present invention relates to the field of manufacturing electroniccomponents. More specifically, this invention relates to encapsulated orinsulated positive temperature coefficient (PTC) devices.

It is well known that the resistivity of many conductive materialschanges with temperature. The resistivity of a positive temperaturecoefficient (“PTC”) material increases as the temperature of thematerial increases. Examples of such a material are crystallinepolymers, made electrically conductive by dispersing conductive fillerstherein. These polymers generally include polyolefins such aspolyethylene, polypropylene and ethylene/propylene copolymers. Carbonblack is an example of a conductive filler.

Typically, a conductive polymer PTC device comprises a layer ofconductive polymer PTC material sandwiched between upper and lower metalfoil electrodes. The prior art includes single layer devices andmultilayer devices, the latter comprising two or more conductive polymerlayers separated by one or more internal metal foil electrodes, withexternal metal foil electrodes on the upper and lower surfaces. Examplesof such devices and their methods of manufacture are disclosed in thefollowing U.S. patents, the disclosures of which are incorporated hereinby reference: U.S. Pat. 6,429,533; U.S. Pat. No. 6,380,839; U.S. Pat.No. 6,242,997; U.S. Pat. No. 6,236,302; U.S. Pat. No. 6,223,423; U.S.Pat. No. 6,172,591; U.S. Pat. No. 6,124,781; U.S. Pat. No. 6,020,808;and U.S. Pat. No. 5,802,709.

At temperatures below a certain value, referred to generally as thecritical or switching temperature, PTC materials of the type referred toabove exhibit a relatively low, constant resistivity. However, as thetemperature of the PTC material increases beyond this point, theresistivity of the material sharply increases with temperature. When thetemperature of the material cools down below the critical or switchingtemperature, the resistivity reverts to its low, constant value.

This effect has been used in the production of electronic PTC devicesproviding overcurrent protection in electrical circuits, where they aregenerally placed in series with a load. Under normal operatingconditions, the resistance of the load and the PTC device is such that arelatively small current flows in the PTC device. Under these conditionsthe temperature of the device due to ohmic heating remains below thecritical or switching temperature of the PTC device. If, however, theload is short circuited or the circuit experiences a power surge, thecurrent flowing through the PTC device increases and the temperature ofthe PTC device rises rapidly due to ohmic heating. As the PTC devicereaches its critical temperature, a significant amount of power isdissipated in the PTC device. Typically, this power dissipation occursonly for a fraction of a second, but the increased power dissipationraises the temperature of the PTC device to a value where the resistanceof the PTC device becomes so high that the current in the circuit islimited to a relatively low value. This limited current value is enoughto maintain the PTC device at a high temperature/high resistanceequilibrium point, but is suitably designed to prevent damage to otherelectrical circuit components. Thus, the PTC device performs thefunction of a fuse, reducing the current flow through the short circuitload to a safe, relatively low value when the temperature of the PTCdevice reaches or exceeds the critical temperature.

In order to allow the PTC device to cool down below its criticaltemperature and return to its normal operating, low resistance state, itis necessary to switch off the power or remove the fault conditionresponsible for the short circuit. Thus PTC devices of this type may beseen to operate as resettable electrical circuit protection devices.

Chu et al (U.S. Pat. No. 6,377,467) discloses a surface mount PTCdevice. The construction of the Chu device however suffers from a numberof disadvantages including a limited effective area for the PTCmaterial, and manufacturing difficulties arising from the provision ofelectrical connections to the laminar electrodes of the PTC material byinterconnects passing adjacent to the electrodes.

McGuire et al (U.S. Pat. No. 5,907,272) and McGuire (U.S. Pat. No.5,884,391) disclose a surface mount PTC device, which offers reliableconnections to the laminar electrodes. It is suggested however that themanufacturing methods of these patents maybe inefficient and costly.Moreover, in certain environments and applications, it is necessary toprotect the PTC device from external agents. The disclosed device leavesPTC material exposed to such agents. An example of such an environmentis the use of PTC devices in battery straps. Battery straps are used toprovide a protection circuit within a battery housing to prevent damageto the battery.

Typically, battery straps comprise a PTC device having two leads(straps) soldered, or otherwise fixed to its terminals. These leads areused to provide device connections. In lithium battery applications,lithium salts or other electrolytes may leak on to the PTC device anddamage the PTC material. Accordingly, it is necessary to protect the PTCdevice. One known way of providing protection is to wrap the PTC devicein a protective tape. However, this is a costly and time consumingprocess. In addition, PTC devices are prone to damage from mechanicalmishandling.

Another disadvantage of existing PTC devices is that the creepagedistance between the two terminals is effectively the thickness of thePTC material. In certain environments, for example batteries, thisdistance may be bridged by contaminants such as swarf or battery saltsrendering the PTC device ineffectual.

Accordingly, there is a need for an improved PTC device and method formanufacturing same.

SUMMARY OF THE INVENTION

Accordingly, in a first aspect the present invention provides anencapsulated electronic device comprising an element of electronicallyactive material sandwiched between a first laminar electrode and asecond laminar electrode. A region of insulating material encloses thefirst laminar electrode, the second laminar electrode and the element ofactive material. A first terminal is provided for facilitating anexternal electrical connection to the first laminar electrode and asecond terminal is provided for facilitating an external electricalconnection to the second laminar electrode. The first terminal and thefirst laminar electrode are connected by a first conductiveinterconnection that passes through the region of insulating material. Asecond conductive interconnection that passes through the region ofinsulating material electrically connects the second terminal and thesecond laminar electrode. At least one of the interconnections comprisesa metal plating.

By encapsulating the active material and laminar electrodes within aregion of insulating material, the active material is protected fromexternal agents. The use of a metal plating to provide theinterconnections between the electrode and terminal facilitates themanufacture of the devices using standard PCB processing techniques.Suitably, the first conductive interconnection and the second conductiveinterconnections are both provided by a metal plating.

The electronic device may be a leaded device having a first lead affixedto its first terminal and a second lead is affixed to its secondterminal. A third terminal may be provided on the same side of thedevice as the first terminal and electrically connected to the secondterminal by a first electrical connection formed between opposing sidesof the device through said region of insulating material. The firstelectrical connection may be a plated through hole via. The resultingdevice may be a leaded device having a first lead affixed to said firstterminal and a second lead affixed to said third terminal.Alternatively, the device may be a surface mountable device with thefirst and third terminals providing surface mount technology (SMT)connections. A fourth terminal may be provided on the same side of thedevice as the second terminal and electrically connected to the firstterminal by a second electrical connection formed between opposing sidesof the device through said region of insulating material. This secondelectrical connection may be a plated through hole via.

The region of insulating material may include a first layer ofinsulating material separating said first laminar electrode and saidfirst terminal and/or a second layer of insulating material separatingsaid second laminar electrode from said second terminal. The region ofinsulating material may comprise a printed circuit board material havingan aperture defined therein in which said element of active material isreceived. Suitably, the active material is a positive temperaturecoefficient material, optionally a polymeric material.

In another aspect of the invention, an encapsulated PTC device isprovided comprising a segment of insulating material having an aperturedefined therein. An element of PTC material is received within thedefined aperture. A first surface of the PTC element is covered by afirst laminar electrode and a second surface of the PTC element iscovered by a second laminar electrode. The first electrode issubstantially covered by a first layer of insulating material and thesecond electrode is substantially covered by a second layer ofinsulating material. A first terminal for providing an externalelectrical connection to the first electrode is provided on top of thefirst layer of insulation and a second terminal is provided on thesecond layer of insulation for providing an external electricalconnection to the second electrode. The first terminal is connected tothe first electrode by a first conductive interconnection that passesthrough the first insulating layer and the second terminal is connectedto the second electrode by a second conductive interconnection thatpasses through the second insulating layer.

The resulting encapsulated device has a structure which protects the PTCmaterial from external agents and which may be manufactured using lowcost printed circuit board manufacturing techniques. The first andsecond layers of insulating material may be provided as layers of resin.Suitably, the segment of insulating material comprises circuit boardmaterial. Optionally the circuit board material is a laminate structureof glass or aramid fibers bonded with a resin material. Alternatively,the first and second insulating layers may provide the segment ofinsulating material.

The encapsulated PTC device may be a leaded device with leads fixed tothe first and second terminals. Moreover, the encapsulated device, whenleaded, is particularly suitable as a battery strap.

A third terminal may be provided that is electrically connected to thesecond terminal by a first conductive interconnection that passesthrough the insulating segment. Leads may be fixed to the first andthird terminals to produce a reduced height leaded encapsulated PTCdevice. This is particularly suitable for use as a battery strap. Thefirst conductive interconnection that passes through the insulatingsegment may be a plated through hole via.

Additionally, a fourth terminal may be provided that is electricallyconnected to the first terminal by a second conductive interconnectionthat passes through the insulating segment. The second conductiveinterconnection that passes through the insulating segment may comprisea plated through hole via. The first, second, third and fourth terminalsmay be suitably disposed to provide a symmetrical device. The terminalsof the device may be metal plated. Optionally, the metal plating is acombination of copper, nickel and/or gold. Moreover, the plating maycomprise three separate metal plates of copper, nickel and gold.

In yet another aspect of the invention, a method of manufacturing anelectronic device is provided. The method comprises the step ofproviding an element of electronically active material having a firstmetal layer as a first laminar electrode and a second metal layer as asecond laminar electrode. The first laminar electrode, the secondlaminar electrode and the element of electronically active material aresurrounded with a region of insulating material. A first terminal forfacilitating an external electrical connection to the first laminarelectrode and a second terminal for facilitating an external electricalconnection to the second laminar electrode are provided. A first openingis created through the region of insulating material and a conductivepath provided therein to electrically connect the first terminal and thefirst laminar electrode. Similarly, a second opening is created throughthe region of insulating material and a conductive path provided thereinto electrically connect the second terminal and the second laminarelectrode.

The step of surrounding the first laminar electrode, the second laminarelectrode and the segment of electronically active material with aregion of insulating material may comprise the steps of placing theelement of active material into an aperture defined in a printed circuitboard material. Leads may be fixed to the first terminal and to thesecond terminal.

The method may comprise the additional step of providing a thirdterminal on the same side of the device as the first terminal, andelectrically connecting the third terminal to the second terminal usinga first electrical connection formed between opposing sides of thedevice through said region of insulating material. The step ofelectrically connecting the third terminal to the second terminal may beperformed by metal plating. Leads may be affixed to the first terminaland the third terminal.

The method may comprise the additional steps of providing a fourthterminal located on the same side of the device as the second terminal,and electrically connecting the fourth terminal to the first terminalusing a second electrical connection formed between opposing sides ofthe device through said region of insulating material.

The step of electrically connecting the fourth terminal to the firstterminal is implemented by metal plating. The step of surrounding thefirst laminar electrode, the second laminar electrode and the segment ofelectronically active material with a region of insulating material, maycomprise the step of covering said first laminar electrode with a firstlayer of insulating material and/or the step of covering said secondlaminar electrode with a second layer of insulating material.

The active material may be a positive temperature coefficient material,optionally a polymeric material.

A further aspect of the invention, is a method of manufacturing anencapsulated PTC device comprising the steps of surrounding theperimeter of an element of PTC material with a segment of insulatingmaterial, providing said element of PTC material with a first laminarelectrode substantially covering a first major surface of the PTCelement, providing said element of PTC material with a second laminarelectrode substantially covering a second major surface of the PTCelement, forming a first layer of insulating material substantiallycovering the first electrode, forming a second layer of insulatingmaterial substantially covering the second electrode, providing a firstterminal for facilitating an external electrical connection to the firstlaminar electrode, providing a second terminal for facilitating anexternal electrical connection to the second electrode, forming anelectrical connection between the first terminal and the first electrodethrough said first insulating layer, and forming an electricalconnection between the second terminal and the second electrode throughsaid second insulating layer.

The segment of insulating material may comprise a circuit boardmaterial, optionally a laminate structure of glass or aramid fibersbonded with a resin material. The first and second layers of insulatingmaterial may be provided as layers of resin.

The step of surrounding the circumference of an element of PTC materialwith a segment of insulating material may be performed using the firstand second insulating layers. The method may include the step of fixingleads to the first and second terminals. A third terminal may beprovided electrically connected to the second terminal by the formationof a first conductive interconnection that passes through the insulatingsegment. Leads may be fixed to the first and third terminals. A metalplating process may be used to form the first conductive interconnectionthat passes through the insulating segment.

The method may include providing a fourth terminal and electricallyconnecting it to the first terminal by forming a second conductiveinterconnection that passes through the insulating segment. A metalplating process may be used to provide the first conductiveinterconnection that passes through the insulating segment.

The method may position the first, second, third and fourth terminals toprovide a symmetrical device. The terminals may be plated using a metalplating process. Another aspect of the invention is a method ofmanufacturing a paralleled device comprising the steps of supplying afirst matrix comprising a plurality of devices, each device in the firstmatrix comprising at least one element of electronically active materialsandwiched between two laminar electrodes, wherein a terminal isprovided for each of the two electrodes on both sides of the firstmatrix; depositing a conductive fixing material on the terminals on thetop surface of the matrix; and, placing a second matrix comprising aplurality of devices, each device in the second matrix comprising atleast one element of electronically active material sandwiched betweentwo laminar electrodes, wherein a terminal is provided for each of thetwo electrodes on at least the underside of the matrix, such that thearrangement of terminals on the top surface of the first matrix alignswith the arrangement of terminals on the bottom surface of the secondmatrix, resulting in a combined matrix of paralleled devices.

The use of this method facilitates the concurrent production of asignificant number of paralleled devices, which otherwise would have tobe produced individually. The method may comprise the further step ofsingulating paralleled devices from the combined matrix. Theelectronically active material may be a PTC material, optionally apolymeric PTC-material.

In yet another aspect of the invention, a matrix of devices is providedwherein each device comprises a first laminar electrode, a secondlaminar electrode, a segment of electronically active materialsandwiched between said first laminar electrode and said second laminarelectrode, a first terminal for facilitating a connection to the firstlaminar electrode, a second terminal for facilitating a connection tothe second laminar electrode, a first layer of insulating materialseparating the first terminal from the first laminar electrode, and asecond layer of insulating material separating the second terminal fromthe second laminar electrode, wherein adjacent elements ofelectronically active material are separated from each other by a regionof insulating material.

The region of insulating material may be a section of PCB materialhaving apertures or pockets defined therein for receiving the elementsof electronically active material. Alternatively, the region ofinsulating material comprises the first layer of insulating material andsaid second layer of insulating material. The electricalinterconnections may be provided between the first terminal and thefirst electrode by at least one plated blind via passing through thefirst layer of insulating material. The electrical interconnectionsbetween the second terminal and the second electrode suitably may beprovided by at least one plated blind via passing through the secondlayer of insulating material. Each device in the matrix may have a thirdterminal located on the same surface of the matrix as the first terminaland electrically connected to the second terminal by a first electricalconnection formed between opposing surfaces of the matrix through saidregion of insulating material by a plated through hole via. Theindividual devices of the matrix may be configured as surface mountabledevices said first and third terminals providing SMT connections. Afourth terminal for each device may be located on the same surface ofthe matrix as the second terminal and electrically connected to thefirst terminal by a second electrical connection formed between opposingsurfaces of the device through said region of insulating material by aplated through hole via. The active material in the matrix may be apositive temperature coefficient material, optionally a polymericmaterial, or it may be a dielectric material, a resistive material, amagnetic material, or a semiconductor material. A shared region of metalmay provide the terminals of adjacent devices in the matrix.

The invention also provides for a component singulated from the matrix.The component may be configured as a SIP component, in which the firstand second terminals of each device are aligned along one edge of thedevice. The first terminal in the component device may be connected toan underlying third terminal by means of a first plated through-holeconnection through the region of insulating material. The secondterminal in the component device may be connected to an underlyingfourth terminal by means of a second plated through hole connectionpassing through the region of insulating material. Alternatively, thecomponent may be configured as a DIP component. The component may be aleaded device with a suitable lead frame attached to the first andsecond terminals. The component may include two or more devices. One ormore of the devices in the component may be a PTC device, optionally ofthe conductive polymer type. The component may be adapted to have one ormore circuit protection devices or components of another type mountedthereon, such as, for example, a thyristor, a metal oxide varistor,and/or a gas discharge tube.

The above-mentioned advantages of the present invention, as well asothers, will be more readily appreciated from the detailed descriptionthat follows.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a perspective view of a PTC element comprising a segment ofPTC material laminated between two metal layers, which is used in theconstruction of a PTC device according to the invention;

FIG. 2 is a perspective view of a individual section of a board havingan aperture formed therein for receipt of the section of PTC material ofFIG. 1, the individual section being shown for the purpose ofillustrating the steps in the method of fabricating a PTC device inaccordance with the present invention;

FIG. 3 is a perspective view of a board comprising a plurality ofindividual sections of the type shown in FIG. 2 with a PTC element ofthe type shown in FIG. 1.

FIG. 4 is a cross sectional view of an arrangement comprising thesection of board of FIG. 2, taken along line X-X of FIG. 2, into whichthe PTC element of FIG. 1 has been placed;

FIG. 5 is a cross sectional view of the arrangement of FIG. 4illustrating a step in the process of the invention;

FIG. 6 is a cross sectional view of the arrangement of FIG. 5illustrating a further step in the process of the invention;

FIG. 7 is a cross sectional view of the arrangement of FIG. 6illustrating a further step in the process of the invention;

FIG. 8 is a cross sectional view of the arrangement of FIG. 7illustrating a further step in the process of the invention;

FIG. 9 is a cross sectional view of the arrangement of FIG. 8illustrating a further step in the process of the invention;

FIG. 10 is a cross sectional view of the arrangement of FIG. 9 adaptedfor use as a leaded/strap device,

FIG. 11 is a cross sectional view of the arrangement FIG. 6 illustratinga step in the process of the invention for the production of a secondembodiment of the invention;

FIG. 12 is a cross sectional view of the arrangement of FIG. 11illustrating a further step in the process of the invention;

FIG. 13 is a cross sectional view of the arrangement of FIG. 12illustrating a further step in the process of the invention;

FIG. 14 is a cross sectional view of the arrangement of FIG. 13illustrating a further step in the process of the invention;

FIG. 15 is a cross sectional view of the arrangement of FIG. 14 adaptedfor use as a leaded/strap device,

FIG. 16 is a cross sectional view of the arrangement of FIG. 11illustrating a first step in an alternative method to FIG. 12;

FIG. 17 is a cross sectional view of a symmetrical embodiment of thedevice;

FIG. 18 is a plan view of a matrix of devices of the type shown in FIG.17,

FIG. 19 is a plan view of an individual device singulated from thematrix of FIG. 18,

FIG. 20 is a plan view of an embodiment of the invention comprising fourindividual devices singulated from the matrix of FIG. 18 as a singlecomponent,

FIG. 21 is a plan view of a SIP embodiment of the invention comprisingfour individual devices,

FIG. 22 is an end view of the SIP embodiment of FIG. 21 with a leadframe attached,

FIG. 23 is a plan view of a second SIP embodiment of the inventioncomprising four individual devices,

FIG. 24 is a plan view of a third SIP embodiment of the inventioncomprising an individual device,

FIG. 25 is a schematic representation of a line protection circuitsuitable for implementation by devices of the invention,

FIG. 26 is a plan view of an implementation of the schematic circuit ofFIG. 25 according to the invention,

FIG. 27 is a side view of a matrix of devices as shown in FIG. 18,

FIG. 28 is a side view of the matrix of FIG. 27 illustrating a furtherstep in a process of the invention,

FIG. 29 is a side view of the matrix of FIG. 28 illustrating a furtherstep in a process of the invention, and

FIG. 30 is a side view of a singulated device formed from the matrix ofFIG. 29.

DETAILED DESCRIPTION OF THE DRAWINGS

Referring now to the drawings, FIG. 1 illustrates a laminated segment10, comprising a layer 16 of electronically active material, (e.g., aconductive polymer PTC material) sandwiched between a first or lowermetal layer 12 and a second or upper metal layer 14 that may be providedas an initial step in the process of manufacturing an electronic devicein accordance with the present invention. In the context of the presentinvention, electronically active material is intended to identify amaterial that may perform an active role in a circuit. Examples of suchmaterials would include, but are not intended to be limited to,dielectric, resistive, magnetic (e.g. ferrite) and semiconductormaterials. The first and second metal layers 12, 14 function as laminarelectrodes for the sandwiched active material 16. The segment 10 may besingulated from a larger laminated sheet. The invention will now bedescribed in greater detail as an embodiment in which the electronicdevice is a circuit protection device and the material is a conductivepolymer PTC material.

The conductive PTC material may be made of any suitable PTC material,including for example suitable conductive polymer compositions. Anexample of a suitable conductive polymer composition would be highdensity polyethylene (HDPE) into which is mixed an amount of carbonblack that results in the desired electrical operating characteristics.An example of such a mixture is disclosed in WO97/06660, the disclosureof which is incorporated herein by reference The metal layers maycomprise any suitable metal foils, with copper being preferred, althoughother metals, such as nickel and aluminum and a number of alloys arealso acceptable. In a specific preferred embodiment, a copper foil isused that has an inner surface that is formed with a micro-texturedsurface (a “nodularized” surface). The nodularized surface is platedwith a very thin passivation layer of nickel, preserving themicro-textured surface profile for improved adhesion to a conductivepolymer layer sandwiched between the foil layers.

A laminated sheet, from which a plurality of individual PTC segments 10may be singulated, may be fabricated by any of several suitableprocesses that are well known in the art, as exemplified by the abovereferenced publication WO97/0660. Suitable techniques for singulationare well known in the art and include routing, guillotining, dicing,punching, laser cutting and scoring.

A segment 18 of a board 17, as illustrated in FIG. 2, is provided havingan aperture 19 defined therein. The aperture 19 is suitably dimensionedto receive the PTC element 10 of FIG. 1. The board may be fabricatedfrom any suitable insulating material, but is preferably a board of thetype used in printed circuit board manufacture. An example of such aboard is a laminate comprising layers of glass or other fiberimpregnated with a suitable plastic material, for example epoxy resin. Asuitable glass-filled epoxy resin material is described generally in theart as FR4 board.

In practice, the board 17 may be suitably dimensioned and arranged, asshown in FIG. 3, to facilitate the concurrent production of a matrixcomprising a plurality of devices. The dashed lines in FIG. 3 only serveto identify individual sections 18 of the board 17 as shown in FIG. 2. Aplurality of apertures 19 are provided in the board, with each aperturedimensioned to receive a corresponding segment of PTC material 10, thusmaking it possible to manufacture a plurality of PTC devicesconcurrently in a matrix. For example, an 18×24 inch (46×61 cm) boardmay be used to produce a matrix of approximately 15,000 PTC circuitprotection devices. It will be appreciated that the ability tomanufacture such a large number of devices concurrently usingconventional processes available from the low cost printed circuit boardindustry result in components having a very low unit cost. Themanufacture of the devices in a matrix form also facilitates theproduction of individual protection components comprising two or morePTC devices. The apertures in the board may be created using anysuitable technique, including for example routing, stamping andpunching. For ease of explanation, the remaining steps of the processwill be described with reference to a section 18 of the board 17 havinga single aperture 19 defined or shaped to receive a correspondinglaminated segment 10. However, it will be appreciated that thesubsequent process steps are intended to be performed on a board havinga plurality of apertures, and that the individual board section 18 isonly shown for ease of explanation.

The process begins, as shown in FIG. 4, with the placing of thelaminated segment 10 within the aperture defined in the section 18 ofboard 17 of FIG. 2. The segment 10 may have metal layers 12, 14 attachedon opposing sides of the PTC material 16 as illustrated in FIG. 1. As analternative to commencing with a PTC element having a laminar structureof PTC material and metal foils, a segment of PTC material (withoutfoils) may be placed within the aperture 19 defined in the board andmetal foils placed on top and underneath the board as part of themanufacturing process. This method of applying laminar electrodes to thePTC material may be more cost effective and effective than applying thelaminar electrodes as part of an extrusion process when producing asheet of PTC material. To prevent shorting, arising from subsequentsteps in the process, the metal foils placed on the top and bottom maybe etched to provide a suitable electrode pattern.

To ensure that individual segments 10 may be placed with ease within theapertures 19 defined in the board section 18, the apertures aredimensioned to be slightly larger than the corresponding laminatedsegments 10. For example, if the segment is about 14 mm long and 4 mmwide in size, the aperture might be dimensioned to provide a spacing ofapproximately 20 microns around the segment when positioned in theaperture.

It is intended that the thickness of the segments 10 is substantiallythe same as the thickness of the board. However, an exact match is notessential and appropriate thicknesses may be selected for convenience.For example, a typical thickness for a Printed Circuit Board (PCB) wouldbe 300 microns, whereas a typical thickness for the laminated segmentmight be in the range of 260 microns to 280 microns.

Although the segments may be placed within the apertures using a manualtechnique, i.e. hand placing, there are a number of techniques which aremore suitable to mass production, for example, pick and place machinesor shaking tables.

To retain the PTC element 10 within the aperture 19 of the board section18, a first layer of insulating material 20 is provided to cover thefirst layer 12 of metal and the bottom surface of the board section 18,as shown in FIG. 5. Similarly, a second layer 22 of insulating materialis provided to cover the second layer 14 of metal and the opposing (top)surface of the board section 18. The first and second layers ofinsulating material 20, 22 co-operate with the board section 18 toeffectively encapsulate the PTC segment. In practice, the board may beplaced on the first layer of insulating material prior to placement ofthe PTC elements within the apertures.

Exemplary insulating materials would include plastic (e.g. epoxy resin).Fibers (e.g. glass) may be included within the insulating material toprovide mechanical strength.

Although the above method steps have been described with reference tothe use of a board having a plurality of pre-defined apertures forreceiving elements of active material, alternative methods may be usedto effectively encapsulate the PTC segment. Moreover, configurations arepossible in which the PTC segment itself defines and is used to form theaperture in which it is effectively encapsulated. In one exemplaryalternative method, a first layer of insulating, e.g. pre-preg, materialis placed on a surface. Advantageously, the first layer of insulatingmaterial may be combined with a metal layer [e.g. using a resin coatedcopper (RCC) material] the advantage of which will be appreciated fromthe description below. Individual PTC segments, comprising a layer ofPTC material sandwiched between two metal electrodes, may then be placedon top of the layer of insulating material, for example using a pick andplace machine or other suitable technique. A second layer of insulatingmaterial (advantageously RCC material) may then be laid on top of thefirst layer of insulating material and PTC segments. The resultingstructure may be placed in a laminating press or similar device. Theheat and pressures of the lamination press will cause the first andsecond insulating layers to join and effectively encapsulate the PTCsegments, resulting in a structure equivalent to that shown in FIG. 5,in which the PTC segment is encapsulated by a top insulating layer 22, abottom insulating layer 20 and enclosed by a region equivalent to theboard section material 18, but which is provided in effect by acombination of the first and second insulation layers 20, 22. It will beappreciated, that the thickness of the layers of insulating materialused in this alternative technique may need to be thicker than in thealternative techniques illustrated with respect to FIG. 1 to 3. Othermethods, including the placing of PTC devices on a surface and thedispensing or spraying of insulating material or the moulding ofinsulating material around the PTC devices, may also be used to providea matrix of encapsulated PTC elements. Moreover, the process ofproviding a matrix of devices having a region of insulating materialaround each device may be performed using a combination of techniquesand the region of insulating material may be the result of severaldifferent steps of applying insulating material and is not intended tobe limited to the specific methods described herein.

Reverting to the main method and referring to FIG. 6, a third layer 24of metal is provided on the first layer 20 of insulating material, forexample by laying a metal foil on top of the insulating material.Similarly, a fourth layer 26 of metal is provided on the second layer 22of insulating material, for example by placing a metal foil underneaththe second insulating layer 20. This results in the structure shown inFIG. 6. Suitable metals for the metal layers include copper, nickel,aluminium, and a number of alloys thereof. The third and fourth layersof metal 24, 26 will ultimately provide first and second terminalsrespectively for facilitating electrical connections to the PTC device.As an alternative, the metal layers may be provided using a plating orother deposition process.

Advantageously, the steps of applying a layer of insulating material andproviding a metal layer may be combined into a single step using a resinclad metal material, for example RCC. The use of RCC allows the metaland insulating layers to be applied concurrently. A suitable RCCmaterial would be a 1080 glass fabric impregnated with approximately 62%resin content and clad with a thickness of copper of about 18 microns.The adherence of the insulating layers to the first and second metallayers 12, 14 and to the third and fourth metal layers 24, 26 may beachieved by conventional PCB techniques including the use of alamination press in a multi layer PCB technique familiar to thoseskilled in the art. It is believed that an advantage of using alaminating press is that during the lamination process, heat developedwill cause the PTC material to expand, as it would during a shortcircuit fault. When the device cools after lamination, the contractingPTC material will cause a flexing of the insulating material in acontrolled matter. It is believed that this self-tripping of the PTCmaterial during the lamination process improves the ultimate performanceof the device. It will be appreciated that the order of assemblydescribed above is not essential and that the alternative orders may beused, for example the process may start with a sheet of RCC materialonto which the board having apertures defined therein may be placed. ThePTC elements may then be placed into the apertures and then the boardcovered with a further sheet of RCC material.

The resulting device structure after lamination, as shown in FIG. 6,effectively provides a fully encapsulated PTC element, which is totallyenclosed within insulating material. Moreover the first and secondlayers of insulating material 20, 22, acting in combination with theboard section 18, provide an insulating barrier surrounding the PTCsegment.

To obtain a device that functions as a PTC device requires the provisionof electrical connections to the laminar electrodes (first and secondmetal layers) 12, 14 of the PTC element through the insulating barrier18, 20, 22. Moreover, it is necessary to provide electricalinterconnections between the first and third metal layers 12, 24 throughthe first insulating layer 20 and between the second and fourth metallayers 14, 26 through the second insulating layer 22.

Before an electrical connection between the first and third metal layers12, 24 may be established, an opening is required from the lower surfaceof the sheet (third metal layer 24) through to the surface of the firstmetal layer 12. Suitable methods for forming such an opening includelaser drilling and etching.

One etching technique which is particularly suitable is a two stepetching process in which the first step is a conventional photo resistand etching process, familiar to those skilled in the art, whichselectively removes metal from the third metal layer 24, in areas 30where an electrical interconnection is required, the result of which isillustrated in FIG. 7. A second step in the process uses a chemicaletch, which is suitably selected to selectively etch insulating materialbut not metal. In this second etching process, the third metal layeracts as a mask to prevent removal of the insulating material in regionsother than that of the opening 30 defined by the first etching step. Thesecond etching step extends the opening 30 through the first insulatinglayer 20. The etching process halts when it reaches the underlying firstmetal layer 12. Thus, as illustrated in FIG. 8, a first path or“micro-via” 30 is opened by etching through the third metal layer 24 andthe first layer of insulating material 20 to the first metal layer 12.The micro-via may be considered as a blind micro-via as it does not passthrough from the top surface to the bottom surface of the device.

Similarly, as shown in FIGS. 7 and 8, a two step etching process may beused to form a second path or micro-via 32 in the top surface of thedevice, through the fourth metal layer 26 in a first etching step, andin a second step through the second insulating layer 22 to theunderlying laminar electrode provided by the second metal layer 14.

Once the micro-vias 30, 32 have been formed, conductive electricalinterconnections may be provided through them by disposing conductivematerial within the micro-vias. One method of providing the conductiveinterconnection is plating. The electrical connections may also beprovided by inserting a conductive material, for example conductiveepoxy or solder paste, into the micro-vias 30, 32. Using a suitableplating process, as shown in FIG. 9, a lower plating layer 42 and anupper plating layer 44 may be deposited on intended areas of the surfaceof the sheet, including building up along the walls of the micro-vias30, 32. In practice, the plating process may combine a number ofindividual processing steps, for example an etch resist layer (notshown) may first be deposited (e.g. by printing) on areas where metalplating is not desired. An electroless plating process may then be usedto provide a thin (seed) plated layer (not shown) upon areas not coveredby the etch resist layer. The thickness of this seed layer of metalplating may be increased using a subsequent electrolytic platingprocess. Typically, the etch resist material is then removed. Thus, asshown in FIG. 9, a first electrical interconnection 46 is providedbetween the first metal layer 12 and the third metal layer 24, and asecond electrical interconnection 48 is provided between the secondmetal layer 14 and the fourth metal layer 26.

The electroless plating process may be a copper based electrolessplating system. If copper plating is used, however, further platingsteps may be advantageously employed to passivate the copper and thusprevent or minimize migration. In particular, an electroless nickelplating process may be used to passivate the copper. In a nickelelectroless plating process, nickel will only form a plating on exposedareas of copper. To provide a final terminal surface suitable forsoldering and other processes, a final electroless plating process maybe used to provide a gold plating on exposed areas of plated nickel.

The resulting structure provides a PTC device in which the PTC material16 is insulated by the surrounding board section 18 in combination withthe first and second layers of insulating material 20, 22 that cover thelaminar electrodes 12, 14 of the segment 10. Electrical connections tothe resulting device are available from the top and bottom terminals 42,44 (plated third and fourth metal layers respectively) which areelectrically connected to the underlying laminar electrodes 12, 14,respectively, by the first and second interconnections 46, 48,respectively, that are formed within the micro-vias 30, 32, as describedabove.

As the device is effectively protected by the insulating material, lesscare is required in the packaging of the individual devices, resultingin lower packaging and handling costs.

To facilitate the use of the device in particular electronicapplications, first and second leads 50, 52 may be attached to thedevice, as shown in FIG. 10. These leads may be soldered, or otherwiseaffixed, directly to the plated top and bottom terminals 42, 44. In abattery strap application, these leads typically comprise flexible metalstraps, made of, for example, a high purity nickel of approximately0.127 mm thickness.

In certain applications where there is limited headroom, the height ofcomponents is a critical issue. In the case of battery strapapplications, where the PTC device is intended to be housed within thehousing of the battery, any reduction in height is desirable as thebattery tends to occupy a significant space within modern electronicdevices, e.g. mobile phones, and any reduction in this space isimportant to reduce the overall size of electronic devices.

In a further embodiment of the invention, a device is provided, asillustrated in FIG. 15, which has a reduced height. This reduction inheight is achieved by the placement of two terminals 64, 66 and twodevice leads 70, 72 on the same side of the device.

In order to place the leads 70, 72 on the same side of the device, it isnecessary to provide an electrical connection 60 between the opposingsides of the PTC device. The provision of this electrical connectionwill now be described with reference to FIG. 11 which correspondsdirectly to the structure of FIG. 6 with the provision of an additionalaperture (through hole via) 56 which passes from the top surface of thelaminated board structure through to the bottom surface of the laminatedboard structure, without contacting the PTC material 16, i.e. throughthe fourth metal layer 26, the second insulating layer 22, the boardsection 18, the first insulating layer 20, and the third metal layer 24.This aperture 56 may be formed using any suitable process includingetching, drilling, laser drilling and punching.

Once the aperture 56 has been formed, an electrical connection 60 may beestablished through this aperture 56 between the third metal layer 24and fourth metal layer 26, as shown in FIG. 14. As the aperture 56 doesnot pass through the PTC segment 16, the electrical connection 60 iseffectively insulated from the PTC segment.

The electrical connection 60 may be provided at the same time asproviding the first electrical interconnection 46 between the first andthird metal layers and the second electrical interconnection 48 betweenthe second and forth metal layers, or in a separate process.

Thus, for example the electrical connection 60 may be provided by thesame process described above or a separate plating process, or by theinsertion of solder paste or other conductive material within theaperture 56.

In order to facilitate connections to the bottom surface of theresultant device, metal may be selectively removed from the third metallayer (for example, by etching), to provide two separate terminals 64,66 separated by a region 62 where metal has been removed, as shown inFIG. 14. This selective removal of metal may be performed after theprovision of the electrical connection between the third and fourthlayers or more advantageously before the plating process as illustratedin FIG. 12, FIG. 13, and FIG. 14. With respect to FIG. 12, a two stepetching process, as described above with respect to FIG. 7 and FIG. 8may be used to selectively remove metal from the third metal layer andinsulating material in areas 30 where an electrical interconnection isrequired so as to open a first path or “micro-via” 30. Similarly, a twostep etching process may be used to form a second path or micro-via 32in the top surface of the device, through the fourth metal layer 26 in afirst etching step, and in a second step through the second insulatinglayer 22 to the second metal layer 14.

Once the openings 30,32 for the micro-vias have been formed, a region ofmetal may be selectively removed from the third metal layer (forexample, by etching), to provide two separate regions 58, 59 forterminals separated by a region 62 where metal has been removed, asshown in FIG. 13. A plating process, as described above, may be used toprovide electrical connections through the micro-vias, and to provide aprotective plating on the resulting terminals 64, 66. Moreover, anelectroless plating process may be used to provide a thin (seed) platedlayer upon areas not covered by a previously applied etch resist layer.The thickness of the metal plating may then be increased using anelectrolytic plating process. Conventionally, the previously appliedetch resist material may then be removed.

An alternative method of forming the electrical connections to that ofthe method described above with reference to FIGS. 12 and 13 whichadvantageously uses one less etching step, commencing from the structureof FIG. 11, uses an etching process to provide an opening 30 byselectively removing metal from the third metal layer 24, in areas 30where an electrical interconnection is required. In the same etchingprocess, a region of metal is selectively removed from the third metallayer 24 to define two separate regions for subsequent use as terminals58, 59 separated by a region 62 where metal has been removed. Similarly,as shown in FIG. 16 an etching process may be used to provide an openingby selectively removing metal from the fourth metal layer 26, in areas32 where an electrical interconnection is required. Further steps areused to extend the openings/blind via 30, 32 through the insulatinglayers 20,22 to the underlying laminar electrodes 12,14. However, toensure that the insulating material is not removed from the regionseparating the terminal regions, a laser drilling or similar process isused in place of the chemical etch previously described to extend themicro-vias through to the underlying laminar electrodes 12,14. Thisresults in the same structure as illustrated in FIG. 13 effectivelyusing one less etching process compared to the previously describedmethod as the formation of terminals 64,66 and the initial opening ofthe micro-via 30,32 are performed concurrently.

As described above, plating or other processes may be used to provideelectrical connections through the micro-vias (effectively to formplated micro-vias), connections through the aperture 56 from the topsurface to the bottom surface and to provide a protective conductivecoating on the terminals.

The resulting structure, as shown in FIG. 14, comprises a PTC device inwhich the terminals 64, 66 that provide electrical connections to thedevice are on the bottom surface of the device. Thus the device may beused directly in surface mount applications. Moreover, the device may beused to provide a leaded PTC device as shown in FIG. 15 in which theleads 70, 72 are fixed to the terminals 64,66 on the same side of thedevice, thus providing a height saving equivalent to the thickness ofone lead when fixed to the device. This is particularly advantageous inbattery strap applications. The leads may be fixed for example bysoldering or conductive glue.

The device illustrated in FIG. 14 is non-symmetrical in the sense thatthe device may only be placed on board (when used as an SMT device),right way up, or the two leads may only be attached on one side. Afurther embodiment, as illustrated in FIG. 17, provides for asymmetrical device. To provide a symmetrical device, a second electricalconnection 80 is required between the top and bottom surfaces of thedevice. In the exemplary symmetrical device shown, a second aperture orthrough hole via is provided from the fourth metal layer 26 through tothe third metal layer 24, through the first insulating layer 20, theboard section 18 and the second insulating layer 22. This second via maybe provided in the same manner, in fact using the same processes, as thepreviously prescribed via 56 of FIG. 11. Once the via has been created,an electrical connection may be formed through the via aperture betweenthe top and bottom surfaces of the device, for example using the platingprocess previously described to produce a plated through hole via 80.

To provide a symmetrical device, the bottom layer is divided into twoterminals 64, 66 as previously described, and similarly the top layer ofthe device (plated fourth metal layer) is divided into two terminals 74,76, for example by means of a conventional photo resist and etchingtechnique using the methods described previously in respect of thedivision of the bottom layer to define two terminals.

This results in a structure, as shown in FIG. 17, in which fourterminals 64, 66, 74, 76 are provided for connecting to the PTC device.As paired terminals 64,74; 66,76 are provided on opposing surfaces ofthe device, the resulting structure provides an encapsulated symmetricalPTC device. In particular, a first terminal 64 provides an electricalconnection to the first laminar electrode 12 of the PTC device via thefirst plated interconnection 46 through the third metal layer 24 and thefirst insulating layer 20. A second terminal 76 provides an electricalconnection to the second laminar electrode 14 of the PTC device via thesecond plated interconnection 48 through the fourth metal layer 26 andthe second insulating layer 22. The third terminal 66 is connected tothe second terminal 76 by a plated interconnection (through hole via) 60through the first insulating layer 20, the board section 18, and thesecond insulating layer 22. The fourth terminal 74 is connected to thefirst terminal 64 by the plated interconnection 80, which passes throughthe first insulating layer 20, board section 18 and the secondinsulating layer 22. The first and third terminals 64, 66 are separatedfrom each other by a region 62 where the third metal layer 24 has beenselectively removed. Similarly, the second and fourth terminals 74, 76are separated from each other by a region 78 where the fourth metallayer 26 has selectively been removed by an etching process.Advantageously, the etching step may also be employed to provide devicemarking by etching out appropriate patterns in regions of the top and/orbottom metal layers not functionally required.

As explained above, a plurality of devices are intended to beconstructed in a single matrix 90 as shown in FIG. 18. In practice thematrix will comprise a significantly larger number of devices. It issometimes desirable that electrical connections be available to the sideof devices. The matrix 90 of PTC devices 92 facilitates this possibilityas devices 92 may be singulated along lines defined by the platedapertures 60, 80 (as shown in dashed outline) thus resulting in thestructure shown in FIG. 19 in which electrical connections may be madedirectly to the resulting plated channels 84, 82, corresponding to theeffectively dissected plated apertures 60, 80, disposed on opposing endsof the device.

The embodiment of FIG. 19 may be adapted to provide a multi-PTC device,as illustrated in FIG. 20. This multi-PTC device presents a plurality ofthe PTC devices, of the type illustrated in FIG. 14, which arefabricated in a matrix using the processes described above. During thesingulation process, a group of the PTC devices are singulated as anarray 100. The exemplary array 100 shown comprises four individual PTCdevices, although the exact number of devices can be altered dependingon circumstances. Each of the individual PTC devices in the array haspairs of terminals 94 a, 94 b; 95 a, 95 b; 96 a, 96 b; 97 a, 97 b in theform of plated channels on opposing sides of the device 100 to whichelectrical connections may be made. It will be appreciated, that thethird and fourth metal layers will need to be etched or otherwiseprocessed during manufacture to isolate adjoining PTC devices in thearray from each other. The array may readily be structured or configuredto resemble an integrated circuit structure for subsequent use by pickand place machines. Apart from appropriately dimensioning the array andpositioning the plated channels to represent appropriate IC sizing andconnections, additional features may be included during themanufacturing process. For example, a notch 90 may be provided in thetop center of the array to identify the position of the top of thedevice. Similarly, a small dot 92 may be provided in the top left handcorner of the array to identify the top left hand corner of theresulting device. These additional features may be provided usingconventional PCB techniques including etching as integral steps withinthe manufacture of the matrix described above before singulation.

The resulting IC type device may be readily modified for use as a dualin-line package (DIP) by appropriate fixing of a lead frame.

Although DIP packages are popular, in circumstances where board space isat a premium, single in-line packages (SIP) are preferred. The presentinvention may be readily adopted for use as a SIP package by providingpaired terminals for connecting to each PTC device along one side of thearray rather than on opposing sides of the device. An exemplaryarrangement for a SIP package is shown in FIG. 21, in which a matrix offour devices of the exemplary structure shown in FIG. 9, where theterminals for providing connections are disposed on opposing sides ofthe device, is provided. The dashed outlines represent the terminals 110a, 110 b, 110 c, 110 d on the underside of the device. In this exemplarystructure, the metal layers providing the terminals have been suitablyetched or otherwise processed to produce the terminal configurationsshown. In effect paired terminals for each of each devices are providedalong a single edge of the array device. The paired terminals 110 a, 114a; 110 b, 114 b; 110 c, 114 c; 110 d, 114 d for each device are onopposing surfaces. Using an appropriate lead frame, leads 120 may beconnected which provide a connection to both sides, as shown in FIG. 22,thus obviating the requirement for providing electrical interconnectionsfrom the top surface of the device through to the bottom surface of thedevice. The second terminals 114 a, 114 b, 114 c, 114 d of each pair ofterminals for the device are respectively connected by tracks 115 a, 115b, 115 c, 115 d to the region 112 a, 112 b, 112 c, 112 d respectively inthe top metal layer where the blind micro-vias have been used to providea connection to the underlying laminar electrode of each device. It willbe appreciated that these tracks may be formed in the same etchingprocess that defines the terminals.

Although, this exemplary SIP package is suitable for use with a leadframe that attaches to both the top and bottom surfaces of a device, itis not suitable for use in situations where the leads of the lead frameare attached to a single surface of the device. In these situations, itis necessary to provide a connection between the terminals on opposingsurfaces of the device as was described with reference to the use of theplated through hole 60 of FIG. 14 to provide a SMT component. Anexemplary construction is the electronic protection component shown inFIG. 23, which illustrates a quad PTC device 150 having terminals 151,152, 153, 154, 155, 156, 157, 158 for connection to a single sided leadframe aligned along an edge of the device. Plated through hole vias 160,161, 162, 163 (along which the devices are singulated) provide theconnections between the top and bottom surfaces and associated tracks164,165,166, 167 provide connections between the opposite edges of thedevice as was previously described with reference to FIG. 21.

A drawback of the embodiment of FIG. 23 is that tracks are required toprovide a connection between the two sides of the device. An improvedembodiment, as shown in FIG. 24, provides the terminals along the sameedge of the device without the need for tracks. In particular, thedevice has two terminals 170, 171, with each terminal connecting to alaminar electrode of a PTC device encapsulated within the device. Thetwo terminals 170, 171 are arranged along the same device edge. Platedthrough hole connections 172,173 (formed prior to singulation from amatrix structure described above) provide connections between the topand bottom surfaces of the terminals. As described previously, thethrough hole connections 172,173 pass through a region of insulatingmaterial and do not make contact with the embedded PTC material 175(shown for illustration by means of dashed outline in FIG. 24). One ofthe terminals 170 connects with a laminar electrode by means of a blindmicro via 177 (previously described) on the top surface of the device,whereas the other terminal 171 connects with the remaining laminarelectrode by means of a blind micro via 179 (shown also in dashedoutline) on the bottom surface of the device. The resulting component isa SIP device suitable for use as an SMT component where the terminalsfunction as SMT connections. Alternatively, the component may be used asa leaded device by attachment of a lead frame. In either case, thecomponent is not limited to single devices and it will be appreciatedthat a SIP device may be manufactured having a plurality of PTC devicesencapsulated therein, with each device having two terminals disposedalong an edge of the component. Moreover, it will be appreciated thatthe exact number of PTC devices for a particular component is decided bythe number of PTC devices grouped together as a single component duringsingulation of the matrix described above.

Depending on the application, the individual characteristics of the PTCdevices of the multi-PTC device (e.g. SIPs, and DIPs) may be equivalentor different. Different characteristics may be achieved by havingdifferently sized PTC segment areas and correspondingly sized aperturesin the board for receiving each of the individual PTC segments.

As the PTC devices described herein are manufactured using conventionalPCB techniques, the resulting devices may be used as miniature printedcircuit boards onto which further circuit protection devices, forexample a battery charge controller or over voltage protection devicesincluding gas discharge tubes, thyristors or metal oxide varistors (MOV)may be fixed, for example by direct soldering to the terminals, toprovide a circuit protection module. For example, the exemplarydifferential line protection circuit shown in FIG. 25 comprising two PTCdevices 210,212, providing over current protection, each in series witha separate incoming line 200,202, followed by an over voltage protectiondevice 214, for example a metal oxide varistor (MOV), thyristor or gasdischarge tube (GDT), in parallel with the outputs 204,206 may bemanufactured by singulating a DIP package from the previously describedmatrix to provide two PTC devices, with each of the PTC devices havingan input terminal 200,202 on one side of the device and an outputterminal 204,206 on the opposing side of the device. The top surface ofthe singulated device is suitably configured, as shown in FIG. 26, suchthat the output terminals on the top surface of the device aredimensioned to act as pads 220, 222 for receiving the voltage protectiondevice 214. The voltage protection device 214 may be pick and placedonto the pads 220,224 and fixed in place using a suitable means, forexample either using pre-placed solder paste (which may be thenreflowed) or a conductive epoxy. The resulting device may be used as anSMT line protection device, with the terminals underlying the device (orplated channels\notches) at the sides providing SMT connection points.Additionally, as described above, suitable device markings may beincluded to aid orientation of the device. For example, a notch 218 maybe provided in the top center of the array to identify the position ofthe top of the device. Similarly, a small dot 216 may be provided in thetop left hand corner of the array to identify the top left band cornerof the resulting device. Although, the exemplary protection circuit hasbeen shown as a 4 pin DIP SMT component, it is not limited to thisconfiguration. Moreover, the size of the overall component will belimited by the minimum size of protection device required\available fora particular application.

A drawback of existing PTC devices is that the effective area of the PTCmaterial limits the trip currents of the devices. However, as circuitboard space is generally at a premium, designers are reluctant to usedevices having large device footprints. One solution to this problem isthe previously described SIP packages. Another, known solution is toprovide PTC devices in a parallel configuration using a multilayerdevice construction. However, these known constructions are overlycomplex in their manufacture.

The matrix construction of the present invention facilitates a simpleand efficient method of providing two or more devices in parallel in aquasi-multilayer construction. A side view of a section of a matrix ofdevices (of the symmetrical type shown in FIG. 17) is illustrated inFIG. 27 (the internal construction of the device is not shown for easeof explanation, with the vertical dashed lines representing points alongwhich devices would be singulated equating to the locations of thethrough connections 60,80 of FIG. 17). Each of the individual devices ofthe matrix has four terminals defined to provide device symmetry whensingulated. The method commences with the placing of a first matrix ofdevices 120 in a suitable jig or fixture (not shown). Solder paste 126or other conductive fixing material (e.g. conductive glue) is applied tothe terminal areas 124 on the top surface of the matrix as shown in FIG.28. A second matrix of devices 128 having a matching arrangement ofterminals areas 130 on its underside is then placed on top of the firstmatrix as shown in FIG. 29. In the case of using solder paste, theentire arrangement is then placed in a reflow oven to cause the solderpaste to flow. When cooled the, the two matrices are held together in adouble-decked or duplicate matrix structure by the solder material,which electrically connects the terminals areas of the two matrix. Itwill be appreciated that when the resulting duplex matrix is singulated,the singulated devices, as shown in FIG. 26, are in effect two devices136, 138 connected in parallel with the terminals 140, 142 on the uppersurface of the top device providing one pair of terminals and theterminals on the lower surface of the bottom device providing acorresponding pair of terminals 144, 146 on the bottom surface. Each ofthe top terminals 140, 142 is electrically connected to its respectivebottom terminal 144,146 by respective plated channels (as describedpreviously and shown in dashed outline in FIG. 30) in cooperation withthe solder material 126. This method of manufacturing devices inparallel is not limited to the use of two matrices, several matrices maybe joined concurrently. However, as the number of matrices increases,practical difficulties arise in causing the solder paste to reflowcorrectly. This difficulty may be overcome if a conductive epoxy orother material is used in place of the solder paste.

Although, the present invention has been described with reference to anactive material of the PTC type, it will be appreciated that themanufacturing process of the present invention may be advantageouslyapplied to other active polymer materials and PTC materials and also toother materials including dielectrics, resistive, magnetic andsemiconductor materials.

1. An encapsulated electronic device, comprising; a first laminarelectrode, a second laminar electrode, an element of electronicallyactive material sandwiched between said first laminar electrode and saidsecond laminar electrode, a region of insulating material enclosing saidfirst laminar electrode said second laminar electrode and said elementof active material, wherein said region of insulating material comprisesa first layer of insulating material covering the first laminarelectrode and a second layer of insulating material covering the secondlaminar electrode a first terminal for facilitating an externalelectrical connection to the first laminar electrode, a second terminalfor facilitating an external electrical connection to the second laminarelectrode, a first conductive interconnection that passes through the offirst layer of insulating material to electrically connect the firstterminal and the first laminar electrode, a second conductiveinterconnection that passes through the of second layer of insulatingmaterial to electrically connect the second terminal and the secondlaminar electrode, and further comprising a third terminal located onthe same side of the device as the first terminal and electricallyconnected to the second terminal by a first electrical connection formedbetween opposing sides of the device through said region of insulatingmaterial such that the first electrical connection is insulated from theelement of active material.
 2. An encapsulated electronic deviceaccording to claim 1, wherein said first conductive interconnections andsecond conductive interconnections both comprise metal plating.
 3. Anencapsulated electronic device according to claim 1, wherein saidelectronic device is a leaded device having a first lead affixed to saidfirst terminal and a second lead is affixed to said second terminal. 4.(canceled)
 5. An encapsulated electronic device according to claim 1,wherein said first electrical connection comprises a plated through holevia.
 6. An encapsulated electronic device according to claim 1, whereinsaid device is a leaded device having a first lead affixed to said firstterminal and a second lead affixed to said third terminal.
 7. Anencapsulated electronic device according to claim 1, wherein said deviceis a surface mountable device and said first and third terminals provideSMT connections.
 8. An encapsulated electronic device according to claim1, wherein said device comprises a fourth terminal located on the sameside of the device as the second terminal and electrically connected tothe first terminal by a second electrical connection formed betweenopposing sides of the device through said region of insulating material.9. An encapsulated electronic device according to claim 8, wherein saidsecond electrical connection comprises a plated through hole via. 10-11.(canceled)
 12. An encapsulated electronic device according to claim 1,wherein said region of insulating material comprises a printed circuitboard material having an aperture defined therein in which said elementof active material is received.
 13. An encapsulated electronic deviceaccording to claim 1, wherein said active material is a positivetemperature coefficient material.
 14. An encapsulated electronic deviceaccording to claim 13, wherein said positive temperature coefficientmaterial is a polymeric material. 15-16. (canceled)
 17. An encapsulatedelectronic device according to claim 12, wherein the circuit boardmaterial is a laminate structure of glass or aramid fibers bonded with aresin material.
 18. An encapsulated electronic device according to claim1, wherein the first and second layers of insulating material areprovided as layers of resin.
 19. (canceled)
 20. An encapsulatedelectronic device according to claim 1, wherein said device is a leadeddevice and wherein leads are fixed to the first and third terminals. 21.A battery strap comprising at least one encapsulated electronic deviceaccording to claim
 20. 22-27. (canceled)
 28. An encapsulated electronicdevice according to claim 8, wherein the first, second, third and fourthterminals are suitably disposed to provide a symmetrical device.
 29. Anencapsulated electronic device according to claim 28, wherein theterminals are metal plated.
 30. An encapsulated electronic deviceaccording to claim 29 wherein the metal plating is a combination ofcopper, nickel and/or gold.
 31. An encapsulated electronic deviceaccording to claim 30 wherein the plating comprises three separate metalplates of copper, nickel and gold.
 32. A method of manufacturing anelectronic device, comprising the steps of: (a) providing an element ofelectronically active material having a first metal layer as a firstlaminar electrode and a second metal layer as a second laminarelectrode, (b) surrounding the first laminar electrode, the secondlaminar electrode and the element of electronically active material witha region of insulating material, (c) providing a first terminal forfacilitating an external electrical connection to the first laminarelectrode, said step comprising the steps of covering said first laminarelectrode with a first layer of insulating material and covering saidsecond laminar electrode with a second layer of insulating material, (d)providing a second terminal for facilitating an external electricalconnection to the second laminar electrode, (e) creating a first openingthrough the region of insulating material, (f) providing a conductivepath in said first opening to electrically connect the first terminaland the first laminar electrode, (g) creating a second opening throughthe region of insulating material, (h) providing a conductive path insaid second opening to electrically connect the second terminal and thesecond laminar electrode and (i) providing a third terminal on the sameside of the device as the first terminal and electrically connecting thethird terminal to the second terminal using a first electricalconnection formed between opposing sides of the device through saidregion of insulating material.
 33. A method of manufacturing anelectronic device according to claim 32, wherein said step ofsurrounding the first laminar electrode, the second laminar electrodeand the segment of electronically active material with a region ofinsulating material comprises the steps of placing the element of activematerial into an aperture defined in a printed circuit board material.34. A method of manufacturing an electronic device according to claim32, comprising the additional steps of fixing a first lead affixed tosaid first terminal and a second lead to the second terminal. 35.(canceled)
 36. A method of manufacturing an electronic device accordingto claim 32, wherein said step of electrically connecting the thirdterminal to the second terminal is implemented by metal plating.
 37. Amethod of manufacturing an electronic device according to claim 32,comprising the additional steps of fixing a first lead affixed to saidfirst terminal and a second lead to the third terminal.
 38. A method ofmanufacturing an electronic device according to claim 32, comprising theadditional steps of: providing a fourth terminal located on the sameside of the device to the second terminal, and electrically connectingthe fourth terminal to the first terminal using a second electricalconnection formed between opposing sides of the device through saidregion of insulating material.
 39. A method of manufacturing anelectronic device according to claim 38, wherein said step ofelectrically connecting the fourth terminal to the first terminal usingis implemented by metal plating. 40-41. (canceled)
 42. A method ofmanufacturing an electronic device according to claim 32, wherein saidactive material is a positive temperature coefficient material.
 43. Amethod of manufacturing an electronic device according to claim 42,wherein said positive temperature coefficient material is a polymericmaterial.
 44. A method of manufacturing an electronic device accordingto claim 32, wherein the step of surrounding the first laminar electrodethe second laminar electrode and the element of electronically activematerial with a region of insulating material comprises the step ofsurrounding the circumference of an the element of electronically activematerial with a segment of insulating material.
 45. A method ofmanufacturing an electronic device according to claim 44, wherein thesegment of insulating material comprises circuit board material.
 46. Amethod of manufacturing an electronic device according to claim 45,wherein the circuit board material is a laminate structure of glass oraramid fibers bonded with a resin material.
 47. A method ofmanufacturing an electronic device according to claim 32, wherein thefirst and second layers of insulating material are provided as layers ofresin. 48-54. (canceled)
 55. A method of manufacturing an electronicdevice according to claim 38, wherein the first, second, third andfourth terminals are positioned to provide a symmetrical device. 56-88.(canceled)